Title :
Novel dual gate high voltage TFT with variable doping slot
Author :
Krishnan, S. ; Narayanan, E. M Sankara ; Xu, Y.Z. ; Clough, F.J. ; De Souza, M.M. ; Flores, D. ; Vellvehi, M. ; Millan, J.
Author_Institution :
Emerging Technol. Res. Centre, De Montfort Univ., Leicester, UK
fDate :
6/24/1905 12:00:00 AM
Abstract :
A novel high performance dual gated, glass compatible polycrystalline silicon HVTFT with blocking voltage in excess of 300 V is demonstrated. This device shows an order of magnitude improvement in the on-state performance in comparison to its offset drain (DG-OD) counterpart. The significantly enhanced performance of this dual gate device is due to an offset region doped through slots of reducing dimensions from the source (control gate) to the drain (sub-gate).
Keywords :
doping profiles; elemental semiconductors; power field effect transistors; silicon; thin film transistors; 300 V; blocking voltage; control gate; dual gate high voltage TFT; dual gated glass compatible polycrystalline silicon HVTFT; offset drain device; on-state performance; slot doped offset region; source to drain dimensions; sub-gate; variable doping slot; Degradation; Doping; Glass; Insulation; Integrated circuit technology; Isolation technology; Liquid crystal displays; Low voltage; Substrates; Thin film transistors;
Conference_Titel :
Microelectronics, 2002. MIEL 2002. 23rd International Conference on
Print_ISBN :
0-7803-7235-2
DOI :
10.1109/MIEL.2002.1003163
