Title :
VOHL: a VLSI object-oriented hardware language
Author_Institution :
Washington State Univ. at Tri-Cities, Richland, WA, USA
Abstract :
A new hardware description language called VOHL has been designed for detailed structural descriptions of VLSI designs. VOHL has been designed to support object-oriented design descriptions and true extensibility. Since a design is always simulated at the gate level to examine detailed functionality and timing, the emphasis in VOHL is on the structural description at the gate and functional levels of design. A functional level is supported to speed up simulation for non-critical parts of the circuit. VOHL provides detailed structural descriptions of synchronous and asynchronous designs including specification of rise/fall delays and fan-outs. The syntax of VOHL and key features of object-oriented description and extensibility design are elaborated
Keywords :
VLSI; circuit CAD; logic CAD; object-oriented languages; specification languages; VLSI object-oriented hardware language; VOHL; asynchronous designs; functional level; gate level description; hardware description language; synchronous design; Circuit simulation; Computer languages; Design automation; Error correction; Hardware design languages; High level languages; Integrated circuit interconnections; Object oriented modeling; Timing; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1992., Proceedings of the 35th Midwest Symposium on
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-0510-8
DOI :
10.1109/MWSCAS.1992.271007
