DocumentCode :
1614482
Title :
Design-for-Diagnosis Architecture for Power Switches
Author :
Valka, M. ; Bosio, A. ; Dilillo, L. ; Girard, P. ; Virazel, A. ; Debaud, P. ; Guilhot, S.
Author_Institution :
TIMA, Grenoble, France
fYear :
2015
Firstpage :
43
Lastpage :
48
Abstract :
Power-gating techniques have been adopted so far to reduce the static power consumption of an Integrated Circuit (IC). Power-gating is usually implemented by means of several power switches. Manufacturing defects affecting power switches can lead to increase the actual static power consumption and, in the worst case, they can completely isolate a functional block in the IC. Thus, efficient test and diagnosis solutions are needed. In this paper we propose a Design-for-Diagnosis architecture for Power Switches. The proposed approach has been validated through SPICE simulations on ITC´99 benchmark circuits as well as on industrial test case.
Keywords :
design for testability; integrated circuit design; power integrated circuits; design-for-diagnosis architecture; integrated circuit; power switches; power-gating techniques; static power consumption; Circuit faults; Integrated circuits; Monitoring; Power demand; Silicon; Switches; Transistors; Design for Diagnosis; Design for Test; Power Management; Power Switch;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2015 IEEE 18th International Symposium on
Conference_Location :
Belgrade
Print_ISBN :
978-1-4799-6779-7
Type :
conf
DOI :
10.1109/DDECS.2015.18
Filename :
7195666
Link To Document :
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