• DocumentCode
    1614922
  • Title

    PVT Insensitive High-Resolution Time to Digital Converter for Intraocular Pressure Sensing

  • Author

    Hong-Yi Huang ; Jen-Chieh Liu ; Pei-Ying Lee ; Kun-Yuan Chen ; Jin-Sheng Chen ; Kuo-Hsing Cheng ; Tzuen-Hsi Huang ; Ching-Hsing Luo ; Jin-Chern Chiou

  • Author_Institution
    Dept. of Electr. Eng., Nat. Taipei Univ., Taipei, Taiwan
  • fYear
    2015
  • Firstpage
    125
  • Lastpage
    128
  • Abstract
    In this paper, a PVT Insensitive Time to Digital Converter is proposed to provide a stable reference clock signal of a phase-locked loop. The time resolution can be independent on process, voltage, and temperature variations. In order to produce 16-phase signals, eight series of differential delay elements are utilized. Then, interpolated architecture is used to increase the reference frequency such that the time resolution of the time digital converter is improved. Furthermore, implementing a delay element in the oscillator and replica bias circuit can enhance the linearity of the KVCO. Finally, this paper proposes the use of a symmetric time-amplify control circuit, hence, the output pulse width and input cycle time can be synchronized. As the amplification increases the resolution increases, achieving the best resolution of 4.73ps and a maximum detection time of 57.2ns. The test chip is implemented with TSMC 0.18um 1P6M process. The chip area is 0.77×0.32mm2 and the power consumption is 120mW.
  • Keywords
    biomedical measurement; delay-differential systems; digital phase locked loops; eye; pressure sensors; time-digital conversion; 16-phase signals; KVCO; PVT insensitive high-resolution time to digital converter; TSMC 1P6M process; chip area; differential delay elements; input cycle time; interpolated architecture; intraocular pressure sensing; oscillator; output pulse width; phase-locked loop; power 120 mW; power consumption; reference frequency; replica bias circuit; stable reference clock signal; symmetric time-amplify control circuit; temperature variations; test chip; time 4.73 ps; time 57.2 ns; time resolution; voltage variations; CMOS integrated circuits; Delays; Frequency control; Phase locked loops; Signal resolution; Voltage-controlled oscillators; Interpolation; PLL; TDC; Time Amplifier; VCO;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2015 IEEE 18th International Symposium on
  • Conference_Location
    Belgrade
  • Print_ISBN
    978-1-4799-6779-7
  • Type

    conf

  • DOI
    10.1109/DDECS.2015.57
  • Filename
    7195684