Robust shallow trench isolation technique used for 75nm nor flash memory

Author

Liao, Jeng-Hwa ; Wei, Kuo-Liang ; Lee, Hong-Ji ; Cheng, Chun-Min ; Chiang, Chun-Ling ; Hsieh, Jung-Yu ; Yang, Ling-Wu ; Yang, Tahone ; Chen, Kuang-Chao ; Lu, Chih-Yuan

Author_Institution

Technol. Dev. Center, Macronix Int. Co., Ltd., Hsinchu, Taiwan

fYear

2010

Firstpage

260

Lastpage

263

Abstract

We have developed a new Self-aligned poly (SAP) process to improve the tunnel oxide integrity by optimizing the shallow trench isolation (STI) corner rounding profile and reducing the local oxide thinning effect. It is found that double in-situ steam generation (ISSG) liner oxides can effectively improve the STI corner rounding. As for the local oxide thinning effect, the composite pad dielectrics (C-Pad) composed of SiO₂/poly-Si are good to prevent local thinning of tunnel oxide at STI corner. Moreover, using ISSG tunnel oxide can further reduce the local oxide thinning effect. Excellent breakdown characteristics of tunnel oxide by optimizing the key technologies have been verified in this work.

Keywords

flash memories; isolation technology; NOR flash memory; composite pad dielectrics; in-situ steam generation liner oxide; oxide thinning effect; robust shallow trench isolation technique; self-aligned poly process; shallow trench isolation corner rounding profile; size 75 nm; tunnel oxide integrity; Dielectrics; Electric breakdown; Flash memory; Furnaces; Oxidation; Reliability; Silicon compounds;

fLanguage

English

Publisher

ieee

Conference_Titel

Advanced Semiconductor Manufacturing Conference (ASMC), 2010 IEEE/SEMI

Conference_Location

San Francisco, CA

ISSN

1078-8743

Print_ISBN

978-1-4244-6517-0

Type

conf

DOI

10.1109/ASMC.2010.5551465

Filename

5551465