Advanced process technology for a 40-GHz fT self-aligned bipolar LSI

Author

Hashimoto, Takashi ; Satoh, Sayuri ; Yagi, Kiyomi ; Tamaki, Yoichi ; Shiba, Takeo

Author_Institution

Device Dev. Center, Hitachi Ltd., Tokyo, Japan

fYear

1994

Firstpage

76

Lastpage

79

Abstract

This paper describes an optimum rapid thermal processing technology which is suitable for a 40 GHz cut-off frequency (fT) bipolar LSI. Three new techniques have been developed for this purpose. One is in-situ phosphorus doped polysilicon (IDP) emitter technique for reducing thermal budget. Rapid thermal annealing (RTA) technique is used to reduce the emitter-base junction leakage current and to form a shallow junction. And low damage dry etching technique reduces thermal budget for recovery of silicon surface. Using this new technology, high fT of 40 GHz and low E-B junction leakage current have been achieved

Keywords

integrated circuit technology; 40 GHz; Si; cut-off frequency; dry etching technique; emitter-base junction leakage current; polysilicon emitter; process technology; rapid thermal annealing; rapid thermal processing technology; self-aligned bipolar LSI; shallow junction; thermal budget; Breakdown voltage; Cutoff frequency; Dry etching; Large scale integration; Leakage current; Plasma temperature; Rapid thermal annealing; Rapid thermal processing; Silicon compounds; Wet etching;

fLanguage

English

Publisher

ieee

Conference_Titel

Bipolar/BiCMOS Circuits and Technology Meeting,1994., Proceedings of the 1994

Conference_Location

Minneapolis, MN

Print_ISBN

0-7803-1316-X

Type

conf

DOI

10.1109/BIPOL.1994.587864

Filename

587864