Waveform relaxation method with dynamic partitioning technique for bipolar transistor circuits

Author

Hayashi, Koichi ; Komatsu, Mitsuru ; Nishigaki, Masakatsu ; Asai, Hideki

Author_Institution

Dept. of Opt-electron. & Mech. Eng., Shizuoka Univ., Hamamatsu, Japan

fYear

1992

Firstpage

400

Abstract

The waveform relaxation algorithm with the dynamic circuit partitioning technique based on the operation point of bipolar devices is described. The relationship between the element values in the Jacobian matrix and the operating point of bipolar transistors is discussed with reference to the validity of the present technique. The authors´ algorithm is applied to the transient simulation of several digital bipolar circuits and its validity is verified

Keywords

bipolar integrated circuits; bipolar transistor circuits; circuit analysis computing; digital integrated circuits; relaxation theory; Jacobian matrix; bipolar transistor circuits; circuit simulation; digital bipolar circuits; dynamic partitioning technique; element values; operating point; transient simulation; waveform relaxation algorithm; Bipolar transistor circuits; Bipolar transistors; Circuit analysis; Circuit simulation; Coupling circuits; Differential equations; Heuristic algorithms; Jacobian matrices; Partitioning algorithms; Relaxation methods;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1992., Proceedings of the 35th Midwest Symposium on

Conference_Location

Washington, DC

Print_ISBN

0-7803-0510-8

Type

conf

DOI

10.1109/MWSCAS.1992.271277

Filename

271277