Measurements and simulations of breakdown phenomena in a voltage-scalable smart power complementary BiCMOS process

Author

Ryter, R. ; Zingg, R. ; Fichtner, W.

Author_Institution

Integrated Syst. Lab., Swiss Federal Inst. of Technol., Zurich, Switzerland

fYear

1994

Firstpage

131

Lastpage

134

Abstract

Good agreement between 2-D simulations and experiments of device parameters, especially breakdown voltages, allows voltage scaling against cutoff frequency. Measurements and simulations of breakdown phenomena in vertical NPN transistors fabricated with a voltage-scalable smart power complementary BiCMOS process show that the open base and the open emitter breakdown occur at different spatial positions in the device structure

Keywords

power integrated circuits; 2D simulations; breakdown phenomena; complementary BiCMOS process; cutoff frequency; device parameters; open base breakdown; open emitter breakdown; smart power; spatial positions; vertical NPN transistors; voltage scaling; BiCMOS integrated circuits; Bipolar transistors; Breakdown voltage; Cutoff frequency; Diodes; Doping; Electric breakdown; Histograms; Laboratories; Power measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Bipolar/BiCMOS Circuits and Technology Meeting,1994., Proceedings of the 1994

Conference_Location

Minneapolis, MN

Print_ISBN

0-7803-1316-X

Type

conf

DOI

10.1109/BIPOL.1994.587879

Filename

587879

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1620522