Title :
Accuracy evaluation of GEM5 simulator system
Author :
Butko, Anastasiia ; Garibotti, Rafael ; Ost, Luciano ; Sassatelli, Gilles
Author_Institution :
LIRMM, Univ. of Montpellier II, Montpellier, France
Abstract :
Design space exploration (DSE) of complex embedded systems that combine a number of CPUs, dedicated hardware and software is a tedious task for which a broad range of approaches exists, from the use of high-level models to hardware prototyping. Each of these entails different simulation speed/accuracy tradeoffs, and thereby enables exploring a certain subset of the design space in a given time. Some simulation frameworks devoted to CPU-centric systems have been developed over the past decade, that either feature near real-time simulation speed or moderate to high speed with quasi-cycle level accuracy, often by means of instruction-set simulators or binary translation techniques. This paper presents an evaluation in term of accuracy in modeling real systems using the GEM5 simulator that belong to the first class. Performance figures of a wide range of benchmarks (e.g. in domains such as scientific computing and media applications) are captured and compared to results obtained on real hardware.
Keywords :
discrete event simulation; embedded systems; instruction sets; multiprocessing systems; CPU-centric systems; DSE; GEM5 simulator system accuracy evaluation; binary translation techniques; design space exploration; high-level hardware prototyping models; instruction-set simulators; multicore embedded system; quasicycle level accuracy; real-time simulation speed; Accuracy; Benchmark testing; Computer architecture; Hardware; Kernel; Object oriented modeling; GEM5; embedded system; modeling and full-system simulation;
Conference_Titel :
Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2012 7th International Workshop on
Conference_Location :
York
Print_ISBN :
978-1-4673-2570-7
Electronic_ISBN :
978-1-4673-2571-4
DOI :
10.1109/ReCoSoC.2012.6322869