• DocumentCode
    162334
  • Title

    A method for avoiding loops while decomposing the task description graph in system-level synthesis

  • Author

    Arato, Peter ; Drexler, Daniel Andras ; Kocza, Gabor

  • Author_Institution
    Dept. of Control Eng. & Inf. Technol., Budapest Univ. of Technol. & Econ., Budapest, Hungary
  • fYear
    2014
  • fDate
    15-17 May 2014
  • Firstpage
    231
  • Lastpage
    235
  • Abstract
    In system-level synthesis, the graph describing the task may consist of a great number of vertices, thus the design algorithms (e.g. hardware-software partitioning, pipeline synthesis, etc.) may become extremely complicated. This difficulty is relaxed by decomposing the task description graph that is usually unavoidable in system-level synthesis. The decomposing algorithms unite certain vertices of the graph, thus the resulting graph consists of less vertices. However, loops may appear in the decomposed graph, even if the original graph was loop-free, that endangers the efficiency of the design algorithms. We propose an algorithm that generates allowable cuts. We prove that any decomposition made along these cuts always yields a loop-free graph. The method is demonstrated on a simple example. Incorporating optimization criteria in the cut generation is also discussed.
  • Keywords
    data flow analysis; graph theory; optimisation; cut generation; decomposed graph; design algorithms; loop avoidance; loop-free graph; optimization criteria; system-level synthesis; task description graph decomposition; Algorithm design and analysis; Computational intelligence; Conferences; Hardware; Informatics; Partitioning algorithms; Software; directed acyclic graph; graph cutting; loop-free decomposition;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Applied Computational Intelligence and Informatics (SACI), 2014 IEEE 9th International Symposium on
  • Conference_Location
    Timisoara
  • Type

    conf

  • DOI
    10.1109/SACI.2014.6840066
  • Filename
    6840066