A neuromorphic approach to adaptive digital circuitry

A design for an adaptive digital circuit based on neuromorphic (brain-inspired) architecture is proposed. The neuromorphic model used is a two-layered perceptron that utilizes a form of least-mean-square error correction in order to learn appropriate internal representations necessary to accomplish the mapping of binary input vectors into desired binary output vectors. The proposed network design differs from the theoretical model in that limited density between layers and quantized parameter values are used to facilitate VLSI fabrication. Simulation results indicate that the simplified version of the network behaves in ways similar to the fully connected, floating-point network with approximately the same number of elements in the middle layer. Circuits which are designed with neural-inspired, cellular topology would have the advantage of high fault tolerance, since information is stored in neural networks in a distributed, rather than a local, fashion