Title :
Algorithm and architecture for quarter pixel motion estimation for H.264/AVC
Author :
Chatterjee, Sudip K. ; Chakrabarti, Indrajit
Author_Institution :
Dept. of E & ECE, IIT Kharagpur, Kharagpur, India
Abstract :
The present paper proposes a fast algorithm and its VLSI architecture for fast quarter pixel (QP) accurate motion estimation (ME). The proposed algorithm is based on the distribution of the QP motion vectors (MVs) around the half pixel MV. The proposed algorithm efficiently explores the most likely QP locations and therefore skips the unlikely ones. The number of QP search locations for the proposed algorithm is reduced by 50% compared to the original full search method but results in only about 0.12 dB peak signal to noise ratio degradation. The VLSI architecture of the proposed algorithm theoretically can process thirty three 1280×720 HDTV frames per second. The power consumption of the proposed architecture is also reduced by 15? compared to a recently reported architecture.
Keywords :
VLSI; high definition television; motion estimation; search problems; vectors; video coding; H.264-AVC; HDTV frame; MV; QP search location method; QPME; VLSI architecture; motion vector; quarter pixel motion estimation; signal to noise ratio degradation; Algorithm design and analysis; Clocks; Computer architecture; Hardware; Motion estimation; Random access memory; Very large scale integration; fast motion estimation algorithm; low power VLSI design; memory access; motion estimation; quarter pixel;
Conference_Titel :
Computer Vision, Pattern Recognition, Image Processing and Graphics (NCVPRIPG), 2013 Fourth National Conference on
Conference_Location :
Jodhpur
Print_ISBN :
978-1-4799-1586-6
DOI :
10.1109/NCVPRIPG.2013.6776245