• DocumentCode
    1628044
  • Title

    RF power potential of 45 nm CMOS technology

  • Author

    Gogineni, Usha ; del Alamo, Jeús A. ; Putnam, Christopher

  • Author_Institution
    Massachusetts Inst. of Technol., Cambridge, MA, USA
  • fYear
    2010
  • Firstpage
    204
  • Lastpage
    207
  • Abstract
    This paper presents the first measurements of the RF power performance of 45 nm CMOS devices with varying device widths and layouts. We find that 45 nm CMOS can deliver a peak output power density of around 140 mW/mm with a peak power-added efficiency (PAE) of 70% at 1.1 V. The PAE and Pout decrease with increasing device width because of a decrease in the maximum oscillation frequency (fmax) for large width devices. The PAE also decreases with increasing frequency because of a decrease in gain as the operating frequency approaches fmax. The RF power performance of 45 nm devices is shown to be very similar to that of 65 nm devices.
  • Keywords
    CMOS integrated circuits; CMOS; RF power measurement; power-added efficiency; size 45 nm; size 65 nm; voltage 1.1 V; CMOS technology; Fingers; Geometry; Integrated circuit technology; Noise measurement; Power amplifiers; Power measurement; Radio frequency; Scattering parameters; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Silicon Monolithic Integrated Circuits in RF Systems (SiRF), 2010 Topical Meeting on
  • Conference_Location
    New Orleans, LA
  • Print_ISBN
    978-1-4244-5456-3
  • Type

    conf

  • DOI
    10.1109/SMIC.2010.5422960
  • Filename
    5422960