An efficient implementation of Motion Compensation for AVS HD application based on a coarse-grained reconfigurable processor

This paper presents a new method to implement the Motion Compensation (MC) of AVS decoding process. An embedded coarse-grained reconfigurable processor, called Reconfigurable Multimedia System (REMUS) is used to complete this job. REMUS has been proved to be candidates for multimedia processing. The prominent advantage of REMUS is its high performance on calculation-intensive tasks, of which MC is a typical example. The similar implementation of H.264 based on reconfigurable processor, has been proposed abroad, such as the XPP PACT. However, AVS is a national standard newly approved by China, and there is no such research until recently. The method proposed in this paper can support 1920×1080@30fps real-time decoding of AVS Jizhun profile at 200 MHz, with high performance but of much more flexibility compared with Application Specific Integrated circuit (ASIC).