Low temperature junction formation by solid phase epitaxy on thin film devices: Atomistic modeling and experimental achievements

Author

Sklenard, B. ; Batude, P. ; Pasini, L. ; Fenouillet-Beranger, C. ; Previtali, B. ; Casse, M. ; Brunet, L. ; Rivallin, P. ; Barbe, J.-C. ; Tavernier, C. ; Cristoloveanu, S. ; Vinet, M. ; Martin-Bragado, I.

Author_Institution

LETI, CEA, Grenoble, France

fYear

2014

fDate

18-20 May 2014

Firstpage

1

Lastpage

6

Abstract

In this paper, we address the problem of junction formation with a low temperature processing (≤ 600°C) through Solid Phase Epitaxial Regrowth. We present the main experimental achievements and suggest solutions to optimize the junctions. In particular, atomistic simulations based on kinetic Monte Carlo (kMC) method allow getting insight into the complex physical phenomena that take place during junction formation.

Keywords

Monte Carlo methods; low-temperature techniques; optimisation; semiconductor junctions; silicon-on-insulator; solid phase epitaxial growth; thin film devices; atomistic modeling; atomistic simulations; experimental achievements; kMC method; kinetic Monte Carlo method; low temperature junction formation; low temperature processing; solid phase epitaxial regrowth; thin film devices; Annealing; Junctions; Kinetic theory; Resistance; Silicon; Solids; Stress;

fLanguage

English

Publisher

ieee

Conference_Titel

Junction Technology (IWJT), 2014 International Workshop on

Conference_Location

Shanghai

Type

conf

DOI

10.1109/IWJT.2014.6842024

Filename

6842024