Title :
Fault diagnosis and reconfiguration for reliable VLSI arrays
Author :
Popli, Sanjay P. ; Bayoumi, Magdy A.
Author_Institution :
Center for Adv. Comput. Studies, Southwestern Louisiana Univ., Lafayette, LA, USA
Abstract :
An online fault-tolerant strategy is proposed; it is composed of two phases: testing and locating faults, and reconfiguration. In the first phase, an online testing technique is used, which is a compromise between the commonly used techniques of time and space redundancy. It is capable of detecting permanent as well as transient faults. The reconfiguration phase is realized by using a global control. Switches are used to bypass the faulty processing element (PE). Backtracking is introduced into the algorithm for maximizing the processor utilization, at the same time keeping the complexity of the interconnection circuitry as simple as possible
Keywords :
VLSI; fault location; fault tolerant computing; microprocessor chips; online operation; parallel architectures; redundancy; backtracking; fault diagnosis; global control; interconnection circuitry; online fault tolerance; online testing; processor utilization; reconfiguration; reliable VLSI arrays; space redundancy; time redundancy; Circuit faults; Electrical fault detection; Fault detection; Fault diagnosis; Fault tolerance; Integrated circuit interconnections; Redundancy; Switches; Testing; Very large scale integration;
Conference_Titel :
Computers and Communications, 1988. Conference Proceedings., Seventh Annual International Phoenix Conference on
Conference_Location :
Scottsdale, AZ
Print_ISBN :
0-8186-0830-7
DOI :
10.1109/PCCC.1988.10045
