DocumentCode
1638422
Title
A large-scale Reconfigurable Analog Processor based on Field Programmable Analog Array technology
Author
Fu, Wenhui ; Jiang, Jun ; Qin, Xi ; Yang, Siyu ; Yi, Ting ; Hong, Zhiliang
Author_Institution
State Key Lab. of ASIC & Syst., Fudan Univ., Shanghai, China
fYear
2010
Firstpage
406
Lastpage
408
Abstract
A large-scale Reconfigurable Analog Processor (RAP), based on Field Programmable Analog Array (FPAA), and assisted by Configurable Digital Block (CDB), is introduced. Fine-grained Configurable Analog Blocks (CABs) are used in the FPAA structure for flexibility. Almost all analog functions can be realized through RAP and the digital parts further enhanced the processing ability. Low power consumption design is achieved in the large-scale RAP. The chip was manufactured in 0.18μm CMOS technology. The die area is 13.76mm2. An example of the adaptive filtering is implemented, with current consumption of 0.77mA.
Keywords
CMOS logic circuits; adaptive filters; analogue processing circuits; field programmable gate arrays; CMOS technology; adaptive filtering; configurable analog blocks; configurable digital block; field programmable analog array technology; large-scale reconfigurable analog processor; Arrays; Band pass filters; Cutoff frequency; Field programmable analog arrays; Low pass filters; Power demand;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE International Conference on
Conference_Location
Shanghai
Print_ISBN
978-1-4244-5797-7
Type
conf
DOI
10.1109/ICSICT.2010.5667697
Filename
5667697
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