Title :
Digital calibration implementation for track-and-hold offset in a high-speed timing-interleaved folding and interpolating analog-to-digital converter
Author :
Yu, Jinshan ; Zhang, Ruitao ; Zhang, Zhengping ; Wang, Yonglu ; Can, Zhu ; Lei, Zhang ; Zhou, Yu
Author_Institution :
Nat. Lab. of Analog IC´´s, Chongqing, China
Abstract :
A digital calibration implementation for track-and-hold offset in a high-speed timing-interleaved folding and interpolating analog-to-digital converter is proposed in this paper. The spice simulation and measured results both show that the digital calibration technique can efficiently cancel the T/H offset and improve the linearity of the ADC.
Keywords :
SPICE; analogue-digital conversion; mixed analogue-digital integrated circuits; sample and hold circuits; analog-to-digital converter; digital calibration; high speed timing interleaved folding; spice simulation; track and hold offset; Analog-digital conversion; Calibration; Capacitors; Converters; Integrated circuits; Interpolation; Radar tracking; ADC; Digital Calibration; folding; high-speed; interpolation; track-and-hold;
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE International Conference on
Conference_Location :
Shanghai
Print_ISBN :
978-1-4244-5797-7
DOI :
10.1109/ICSICT.2010.5667796
