DocumentCode :
164171
Title :
Robustness of the floating-gate technique in a very low-noise environment
Author :
Postel-Pellerin, J. ; Micolau, G. ; Abbas, C. ; Chiquet, P. ; Cavaillou, A.
Author_Institution :
IM2NP, Aix-Marseille Univ., Marseille, France
fYear :
2014
fDate :
13-15 Oct. 2014
Firstpage :
287
Lastpage :
290
Abstract :
In this paper we present the development of a cheap test bench to make the acquisition of very low leakage currents in Non-volatile memories. This test bench is embedded in a very particular low-noise environment to reduce ambient vibrations and electromagnetic perturbations. We will principally discuss the robustness of the full experiment concerning the acquisition conditions (integration time and number of measurements, choice of applied biases). Finally we will present the extraction steps and the resulting leakage current, below every direct measurement.
Keywords :
leakage currents; random-access storage; acquisition conditions; ambient vibration reduction; direct measurement; electromagnetic perturbation reduction; floating-gate technique; integration time; nonvolatile memories; very low leakage currents; very low-noise environment; Capacitors; Current measurement; Leakage currents; Logic gates; Nonvolatile memory; Semiconductor device measurement; Voltage measurement; Flash memory; Floating Gate Technique; leakage current; low noise; reliability;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Conference (CAS), 2014 International
Conference_Location :
Sinaia
ISSN :
1545-827X
Print_ISBN :
978-1-4799-3916-9
Type :
conf
DOI :
10.1109/SMICND.2014.6966463
Filename :
6966463
Link To Document :
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