Wideband injection-locked divide-by-3 frequency divider design with regenerative second-harmonic feedback technique

This paper presents an integration of wideband injection-locked divide-by-3 frequency divider with regenerative second-harmonic feedback technique. By using the proposed feedback technique, a divider with a wide input locking range over 10% can be achieved at Ka-band, which performs near the device maximum oscillation frequency (f_MAX) in a CMOS 0.18- μm process. The divider can operate from 33.9 GHz to 37.7 GHz with an input injection power of 0 dBm. The measured input locking range is 3.8 GHz (10.6%). The chip area of the divider core is 0.22 mm². The core power consumption is 11.9 mW at a supply voltage of 0.9 V. At an offset frequency of 200 KHz, the measured output phase noise under lock is -121 dBc/Hz as the input signal with phase noise of -111.5 dBc/Hz is applied. The difference of 9.5 dB in phase noise is close to the theoretical value predicted by the theorem of division-by-3.