• DocumentCode
    1644191
  • Title

    A small test generator for large designs

  • Author

    Kundu, Sandip ; Huisman, Leendert M. ; Nair, Indira ; Ivenaar, V. ; Reddy, Lakshmi N.

  • fYear
    1995
  • Firstpage
    30
  • Abstract
    We report an automatic test pattern generator that can handle designs with one million gates or more on medium size workstations. Run times and success rates, i.e. the fraction of faults that are resolved, are comparable to or better than those reported previously in the literature. No preprocessing is required and the amount of memory needed is less than 100 bytes per gate. The low memory requirements and high performance have been achieved by working with a larger but simpler search space, by simplifying decision making and backtracking and by using only implication techniques that are fast and that require no preprocessing.
  • Keywords
    Automatic test pattern generation; Automatic testing; Cache memory; Circuit faults; Circuit testing; Decision making; Digital circuits; Magnetic memory; NP-complete problem; Workstations;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 1992. Proceedings., International
  • Conference_Location
    Baltimore, MD
  • ISSN
    1089-3539
  • Print_ISBN
    0-7803-0760-7
  • Type

    conf

  • DOI
    10.1109/TEST.1992.527801
  • Filename
    527801