DocumentCode
1644458
Title
Adaptively biased two-stage amplifier
Author
Loikkanen, M. ; Kostamovaara, J.
Author_Institution
Dept. of Electr. & Inf. Eng., Oulu Univ., Finland
Volume
1
fYear
2004
Firstpage
91
Abstract
An adaptively biased amplifier and an adaptive biasing block with almost supply independent behavior are described. Bias currents of the amplifier are adjusted by sensing the input signal amplitude. This adjustment together with a time dependency added to the biasing network causes the adaptively biased amplifier to have approximately the same bandwidth and the same relative stability for large signals as its linear counterpart biased with much higher currents. Simulation results in a 0.35μm CMOS process show that in this way significant power reduction can be achieved, especially in applications where load capacitance is large.
Keywords
CMOS integrated circuits; power amplifiers; 0.35 micron; CMOS process; adaptive biasing block; adaptively biased amplifier; bias currents; biasing network; input signal amplitude; supply independent behavior; time dependency; two-stage amplifier; Bandwidth; CMOS process; Capacitance; Circuits; Current measurement; Differential amplifiers; Input variables; Stability; Strontium; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrotechnical Conference, 2004. MELECON 2004. Proceedings of the 12th IEEE Mediterranean
Print_ISBN
0-7803-8271-4
Type
conf
DOI
10.1109/MELCON.2004.1346780
Filename
1346780
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