Methodology for the efficient use of operands in the design of compound instructions in ASIP

ASIP is widely used for the embedded processor design when stringent requirements are necessary such as fast time-to-market, good performance for the killer application and flexibility from software programming. Compound instruction, one type of various ASIs, gives the developers a chance of satisfying those requirements by encapsulating several operations into one instruction. However, encapsulating several operations into one compound instruction makes it hard to encoding instructions due to the lack of the room for encoding operands. Using implicit-operand requires no bits for encoding operands but increases the register pressure, resulting in many spills. Using the additional instruction words for encoding operands (multi-word instruction) allows the full exploitation of registers available in the processor as operand, but increases the code size. In this paper, we empirically investigate several ways of encoding operands for the compound instruction between the above two extremes, and give an advice for the design of compound instructions having many operands.