Fully differential, 40 Gb/s regulated cascode transimpedance amplifier in 0.13 µm SiGe BiCMOS technology

Author

Amid, S. Bashiri ; Plett, C. ; Schvan, P.

Author_Institution

Dept. of Electron., Carleton Univ., Ottawa, ON, Canada

fYear

2010

Firstpage

33

Lastpage

36

Abstract

A broadband differential Transimpedance amplifier (TIA) has been designed and measured in 0.13μm BiCMOS Technology. Regulated Cascode (RGC) configuration has been employed to reduce the effect of the large parasitic capacitor of the PIN diode. The added C_PD, representing PIN diode parasitic capacitor, is 300fF. The TIA has 53.6 dBO differential transimpedance gain and 28GHz measured bandwidth. The total measured integrated input referred noise is 6.11μA_rms. The TIA chip including the TIA and 3 stages of buffer consumes 110mW power from a 3V power supply. The active chip area is 330μm×210μm and the total chip area including the pads is 1050μm×530μm.

Keywords

BiCMOS integrated circuits; operational amplifiers; p-i-n diodes; PIN diode; SiGe; SiGe BiCMOS technology; broadband differential transimpedance amplifier; differential transimpedance gain; fully differential regulated cascode transimpedance amplifier; parasitic capacitor; regulated cascode configuration; size 0.13 mum; Bandwidth; BiCMOS integrated circuits; CMOS integrated circuits; Current measurement; Gain; Noise; Optical fiber amplifiers; BiCMOS process technology; Optical communication network; Regulated Cascode (RGC); Transimpedance Amplifier;

fLanguage

English

Publisher

ieee

Conference_Titel

Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), 2010 IEEE

Conference_Location

Austin, TX

ISSN

1088-9299

Print_ISBN

978-1-4244-8578-9

Type

conf

DOI

10.1109/BIPOL.2010.5667977

Filename

5667977