Title :
Flit-reservation flow control
Author :
Peh, Li-Shiuan ; Dally, William J.
Author_Institution :
Comput. Syst. Lab., Stanford Univ., CA, USA
fDate :
6/22/1905 12:00:00 AM
Abstract :
This paper presents flit-reservation flow control, in which control flits traverse the network in advance of data flits, reserving buffers and channel bandwidth. Flit-reservation flow control requires control flits to precede data flits, which can be realized through fast on-chip control wires or the pipelining of control flits one or more cycles ahead of data flits. Scheduling ahead of data at rival enables buffers to be held only during actual buffer usage, unlike existing flow control methods. It also eliminates data latency due to routing and arbitration decisions. Simulations with fast control wires show that flit-reservation flow control extends the 63% throughput attained by virtual-channel flow control with 8 flit buffers per input to 77%, an improvement of 20% with equal storage and bandwidth overheads. Its throughput with 6 buffers (77%) approaches that of virtual-channel flow control using 16 buffers (80%), reflecting the significant buffer savings as a result of efficient buffer utilization. Data latency is also reduced by 15.6% as compared to virtual-channel flow control. The improvement in throughput is similarly realized by the pipelining of each control flit a cycle ahead of their data flits, using control and data networks with the same propagation delay of 1 cycle
Keywords :
computer networks; delays; digital simulation; performance evaluation; buffers; channel bandwidth; control flits; data latency; data networks; flit-reservation flow control; onchip control wires; propagation delay; simulations; virtual-channel flow control; Decision support systems;
Conference_Titel :
High-Performance Computer Architecture, 2000. HPCA-6. Proceedings. Sixth International Symposium on
Conference_Location :
Touluse
Print_ISBN :
0-7695-0550-3
DOI :
10.1109/HPCA.2000.824340