DocumentCode
1649705
Title
Circuitry for artificial neural networks with non-volatile analog memories
Author
Shimabukuro, R.L. ; Shoemaker, P.A. ; Stewart, M.E.
Author_Institution
Naval Ocean Syst. Center, San Diego, CA, USA
fYear
1989
Firstpage
1217
Abstract
The design and fabrication of a nonvolatile MOS analog memory (MAM) cell, which is a critical component for the implementation of a neural network chip, is reported. Incorporated in the memory is a novel four-quadrant multiplier which allows either positive or negative stored values and combines the readout with a multiplication with the input signal. Background on artificial neural networks is briefly given, along with a description of how the properties of the memory cell fit in with an integrated circuit implementation. Modified learning algorithms that have been tailored toward VLSI implementation are discussed
Keywords
MOS integrated circuits; analogue storage; integrated memory circuits; memory architecture; neural nets; VLSI implementation; artificial neural networks; four-quadrant multiplier; learning algorithms; nonvolatile MOS analog memory; Analog memory; Application software; Artificial neural networks; Computer architecture; Integrated circuit interconnections; MOSFETs; Neurons; Nonvolatile memory; Oceans; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1989., IEEE International Symposium on
Conference_Location
Portland, OR
Type
conf
DOI
10.1109/ISCAS.1989.100573
Filename
100573
Link To Document