DocumentCode
1649841
Title
Compact model for layout dependent variability
Author
Aikawa, H. ; Sanuki, T. ; Sakata, A. ; Morifuji, E. ; Yoshimura, H. ; Asami, T. ; Otani, H. ; Oyamatsu, H.
Author_Institution
Adv. Logic Technol. Dept., Toshiba Corp. Semicond. Co., Oita, Japan
fYear
2009
Firstpage
1
Lastpage
4
Abstract
We have developed a compact model which deals with MOSFET characteristic variations arising from design layout dependences. It treats many stress related variations and their interactions that are especially important in 45 nm technology node. It is demonstrated that the model can predict MOSFET characteristics used in standard cells with high accuracy.
Keywords
MOSFET; integrated circuit layout; MOSFET characteristic; design layout dependences; layout dependent variability compact model; size 45 nm; CMOS technology; DSL; Electronic mail; Large scale integration; Logic; MOSFET circuits; Manufacturing; Predictive models; Semiconductor device modeling; Stress;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting (IEDM), 2009 IEEE International
Conference_Location
Baltimore, MD
Print_ISBN
978-1-4244-5639-0
Electronic_ISBN
978-1-4244-5640-6
Type
conf
DOI
10.1109/IEDM.2009.5424244
Filename
5424244
Link To Document