Title :
A Graph Theoretic Approach to Partial Scan Design by K-Cycle Elimination
Author :
Park, Sungju ; Akers, Sheldon B.
Keywords :
Circuit testing; Delay; Feedback; Flip-flops; Hardware; NP-complete problem; Sequential analysis; Sequential circuits;
Conference_Titel :
Test Conference, 1992. Proceedings., International
Print_ISBN :
0-7803-0760-7
DOI :
10.1109/TEST.1992.527837
