Author :
Chen, F. ; Chanda, K. ; Gill, J. ; Angyal, M. ; Demarest, J. ; Sullivan, T. ; Kontra, R. ; Shinosky, M. ; Li, J. ; Economikos, L. ; Hoinkis, M. ; Lane, S. ; Mcherron, D. ; Inohara, M. ; Boettcher, S. ; Dunn, D. ; Fukasawa, M. ; Zhang, B.C. ; Ida, K. ; Ema
Author_Institution :
IBM Microeletron., Essex Junction, VT, USA
Keywords :
VLSI; chemical vapour deposition; dielectric thin films; electric breakdown; integrated circuit interconnections; integrated circuit modelling; integrated circuit reliability; silicon compounds; 300 mm; 65 nm; CVD; Cu; ILD; SiCOH; TDDB degradation; electrochemical-reaction-induced degradation model; interconnects; lifetime prediction; long-terrn reliability; low-k dielectric materials; metal diffusion; multilevel VLSI circuits; process integration; time-dependent dielectric breakdown; Chemical technology; Chemical vapor deposition; Degradation; Dielectric breakdown; Dielectric materials; Integrated circuit interconnections; Materials reliability; Microelectronics; Power system reliability; Very large scale integration;
