1653523

Effects of high-k post-deposition cleaning in improving CMOS bias instabilities and mobility: a potential issue in reliability of dual metal gate technology

Akbar, M.S. ; Moumen, Naim ; Barnett, Joel ; Byoung-Hun Lee ; Lee, Byoung-Hun

Microelectron. Res. Center, Texas Univ., Austin, TX, USA

2005

640

641

MOSFET; carrier mobility; dielectric thin films; electron traps; hole traps; interface states; leakage currents; semiconductor device reliability; surface cleaning; CMOS bias instabilities; CMOS device mobility; H₂; H₂O; HCl; HfSiO; bulk traps; charge trapping; dielectric deposition; dual metal gate technology reliability; high-k post-deposition cleaning; interface states; interface traps; leakage current; Annealing; CMOS technology; Cleaning; Electrodes; High K dielectric materials; High-K gate dielectrics; Interface states; MOS devices; Pulse measurements; Wet etching;

English

ieee

Reliability Physics Symposium, 2005. Proceedings. 43rd Annual. 2005 IEEE International

0-7803-8803-8

conf

10.1109/RELPHY.2005.1493182

1493182