Thermal analysis of vertically integrated circuits

Author

Kleiner, Michael B. ; Kühn, Stefan A. ; Ramm, Peter ; Weber, Werner

Author_Institution

Corp. Res. & Dev., Siemens AG, Munich, Germany

fYear

1995

Firstpage

487

Lastpage

490

Abstract

In this paper, a thermal analysis of Vertically Integrated Circuits (VIC) is presented for the first time. Based on a 1-D model, temperature differences in VICs of less than 10°C are evaluated for most practical applications. Detailed 3-D investigations show that self-heating of MOSFETs in the upper chip-layers of a VIC is more pronounced than in bulk CMOS and that it strongly depends on the thickness of the silicon remaining in the chip-layer. In addition, thermal coupling between adjacent transistors is observed to be much more marked

Keywords

CMOS integrated circuits; MOSFET; circuit analysis computing; integrated circuit modelling; temperature distribution; thermal analysis; 0.5 mum; 1-D model; 3-D investigations; Al-SiO₂-Si; CMOS process technology; FEM simulations; MOSFET self-heating; NMOSFET; Si thickness; temperature differences; thermal analysis; thermal coupling; vertically integrated circuits; Aluminum; Fabrication; Heating; Integrated circuit interconnections; Integrated circuit technology; Polyimides; Predictive models; Silicon compounds; Temperature; Thermal conductivity;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1995. IEDM '95., International

Conference_Location

Washington, DC

ISSN

0163-1918

Print_ISBN

0-7803-2700-4

Type

conf

DOI

10.1109/IEDM.1995.499244

Filename

499244