Calibration of mismatch errors in time interleaved ADCs

An efficient way of increasing the sample rate in an A/D converters (ADCs) is to use a time-interleaved structure. The effective sample rate can be increased without increase in sample rate for the individual ADCs. There are however problems with this architecture caused by differences in gain in the ADCs as well as timing mismatch in the sample-and-hold circuits. These mismatch errors will degrade the performance of the time interleaved ADC. We propose algorithms for both identification of the mismatch errors on-line and cancelling of the distortion. The proposed algorithms are suitable for applications that use the discrete multi-tone modulation (DMT) or the orthogonal frequency division multiplex (OFDM) technique