Title :
HDL software development and hardware prototyping of a system-on-chip for an active filter controller
Author :
Labbe, Anna ; Poure, Philippe ; Aubepart, Fabrice ; Braun, Francis
Author_Institution :
L2MP s/c INIT Technopole Chateau Gombert, Marseille, France
fDate :
6/23/1905 12:00:00 AM
Abstract :
This paper deals with design and prototyping of System-on-Chip (SoC) in power electronics. First, a general methodology, based on Hardware Description Languages (HDL) and Field Programmable Gate Array (FPGA) prototyping is developed. Then, authors present an application case: a SoC for fully digital control of an active power filter. After filter control principle development, the digital controller properties are studied. Choices of operation sequences, specific binary format and ADC size are detailed, justified and validated by mixed simulations. Moreover, design of controller architecture and experimental validation of a FPGA prototype are examined
Keywords :
CMOS digital integrated circuits; VLSI; active filters; application specific integrated circuits; circuit CAD; digital control; field programmable gate arrays; hardware description languages; hardware-software codesign; integrated circuit design; microcontrollers; power electronics; power filters; software engineering; ADC size; CMOS ASIC; FPGA prototyping; HDL software development; SoC; active filter controller; active power filter; binary format; digital control; field programmable gate array; hardware description language; hardware prototyping; operations sequences; power electronics; system-on-chip; Active filters; Application software; Digital control; Field programmable gate arrays; Hardware design languages; Power electronics; Programming; Prototypes; Software prototyping; System-on-a-chip;
Conference_Titel :
Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on
Print_ISBN :
0-7803-7057-0
DOI :
10.1109/ICECS.2001.957617