A new flash memory sense amplifier in 0.18 μm CMOS technology

Author

Chrisanthopoulos, A. ; Moisiadis, Y. ; Varagis, A. ; Tsiatouhas, Y. ; Arapoyanni, A.

Author_Institution

Adv. Silicon Solutions Div., Integrated Syst. Dev. S.A., Athens, Greece

Volume

2

fYear

2001

fDate

6/23/1905 12:00:00 AM

Firstpage

941

Abstract

In this paper a new sense amplifier suitable for current sensing in EPROM, E²PROM and flash memories read operation is presented. The proposed sense amplifier provides fast response with low silicon area requirements that make it easily adaptable to the bit-line pitch. In this work simulation results are presented, in 0.18 μm CMOS technology, regarding the delay time versus different precharge voltages and bitline capacitance values, while worst case and high temperature simulations are included in order to expose limitations of the sensors in various operating conditions. Moreover, comparisons are given according to a conventional sensing scheme. Finally, a compact layout design is presented to illustrate the area efficiency of the proposed sense amplifier

Keywords

CMOS memory circuits; EPROM; differential amplifiers; flash memories; integrated circuit layout; 0.18 micron; CMOS technology; EEPROM; EPROM; Si; bit-line capacitance values; bit-line pitch; compact layout design; current sensing; delay time; fast response; flash memory sense amplifier; high temperature simulations; low Si area requirements; memory read access path; precharge voltages; worst case simulations; CMOS technology; Capacitance; Delay effects; EPROM; Flash memory; Operational amplifiers; PROM; Silicon; Temperature sensors; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on

Print_ISBN

0-7803-7057-0

Type

conf

DOI

10.1109/ICECS.2001.957628

Filename

957628