Incorporating signature-monitoring technique in VLIW processors

This paper presents the architecture of watchdog processor using hybrid signature-monitoring technique to detect the control-flow errors occurring in the VLIW processor. The hybrid signature-monitoring technique combines the vertical signature scheme with the horizontal signature scheme. The detailed designs of the watchdog processor that include the synchronous issue between watchdog processor and VLIW processor are discussed. We then implement and validate the proposed watchdog processor in VHDL. The fault simulation is conducted to justify the error-defection coverage and latency.