Gigascale system design - challenges & opportunities

Summary form only given. VLSI system performance increased by five orders of magnitude in the last three decades, made possible by continued technology scaling, improving transistor performance to increase frequency, increasing integration capacity to realize complex architectures, and reducing energy consumed per logic operation to keep power dissipation within limit. The technology treadmill continues to provide integration capacity of billions of transistors; however, power and energy consumption are the barriers. Performance at any cost cannot be an option in the future; system architectures have to emphasize performance delivered in a given power envelope, with complexity limited by energy efficiency. This paper discusses potential solutions in process technology, circuits, and microarchitectures to exploit future gigascale integration capacity. The concept of system on a chip (SOC) helps to integrate diverse functional blocks, providing valued performance. The paper concludes with recommendations to the chip and system designers on how to exploit these emerging paradigms.