• DocumentCode
    1662399
  • Title

    On undetectable faults in partial scan circuits using transparent-scan

  • Author

    Pomeranz, Irith ; Reddy, Sudhakar M.

  • Author_Institution
    Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
  • fYear
    2004
  • Abstract
    We study the undetectable faults in partial scan circuits under a test application scheme referred to as transparent-scan. The transparent-scan approach allows very aggressive test compaction compared to other approaches. We demonstrate that, unlike other approaches that provide high levels of test compaction for partial scan circuits, this approach does not increase the number of undetectable faults. We also discuss the monotonicity of the number of undetectable faults with increased levels of scan.
  • Keywords
    fault diagnosis; logic testing; sequential circuits; partial scan circuits; transparent-scan test; undetectable faults; Application software; Circuit faults; Circuit testing; Cities and towns; Compaction; Electrical fault detection; Fault detection; Fault diagnosis; Flip-flops; Logic testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings. IEEE International Conference on
  • ISSN
    1063-6404
  • Print_ISBN
    0-7695-2231-9
  • Type

    conf

  • DOI
    10.1109/ICCD.2004.1347904
  • Filename
    1347904