XTalkDelay: a crosstalk-aware timing analysis tool for chip-level designs

This paper describes XTalkDelay, an industrial-strength methodology and tool for measuring the impact of crosstalk on delays of paths in a design. The main cornerstone of XTalkDelay methodology, vis-a-vis other approaches, is its high delay computation accuracy. It deliberately avoids the use of approximate models for cells and nets and interconnect reductions. XTalkDelay employs a path-based approach; uses detailed and accurately distributed RC parasitics for critical nets and their aggressors; uses BSIM3-accurate gate models; and invokes HSPICE for delay computation using only the minimum required set of input patterns. XTalkDelay has been successfully applied on two industrial designs.