• DocumentCode
    1663828
  • Title

    A DC-to-1GHz tunable RF ΔΣ ADC achieving DR = 74dB and BW = 150MHz at f0 = 450MHz using 550mW

  • Author

    Shibata, Hajime ; Schreier, Richard ; Yang, Wenhua ; Shaikh, Ali ; Paterson, Donald ; Caldwell, Trevor ; Alldred, David ; Lai, Ping Wing

  • Author_Institution
    Analog Devices, Toronto, ON, Canada
  • fYear
    2012
  • Firstpage
    150
  • Lastpage
    152
  • Abstract
    The ultimate ADC for receiver applications would be one that converts any desired RF signal directly into digital form so that the rest of the signal chain enjoys accurate and flexible digital signal processing and CMOS scaling. Flexibility in center frequency (f0), bandwidth (BW), sampling frequency (fS), full-scale (FS), dynamic range (DR) and power consumption (P) would allow the ADC to handle multiple standards and adapt to the RF environment [1-4]. The ADC reported in this paper is a step toward this Holy Grail of ADCs, supporting fο = 0 to 1 GHz, BW = 35 to 150MHz, fS = 2 to 4GHz and FS = -18dBm to +18dBm. At f0 = 450MHz, BW = 150MHz, fS = 4GHz and FS = +6dBm, the ADC achieves instantaneous DR = 74dB and peak SNR = 69dB with P = 550mW.
  • Keywords
    CMOS integrated circuits; analogue-digital conversion; signal processing; CMOS scaling; bandwidth 35 MHz to 150 MHz; flexible digital signal processing; frequency 0 GHz to 1 GHz; frequency 4 GHz; frequency 450 MHz; power 550 mW; power consumption; receiver application; tunable RF ΔΣ ADC; Bandwidth; CMOS integrated circuits; Clocks; Latches; MOS devices; Modulation; Solid state circuits;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2012 IEEE International
  • Conference_Location
    San Francisco, CA
  • ISSN
    0193-6530
  • Print_ISBN
    978-1-4673-0376-7
  • Type

    conf

  • DOI
    10.1109/ISSCC.2012.6176954
  • Filename
    6176954