DocumentCode
1665962
Title
Gate-Level Simulation of a FPGA-Based PMSM Drive Sensorless Control
Author
Colli, Vincenzo Delli ; Stefano, Roberto Di ; Marignetti, Fabrizio ; Scarano, Maurizio
Author_Institution
Univ. of Cassino, Cassino
fYear
2007
Firstpage
1288
Lastpage
1292
Abstract
The paper considers a simple observer exploiting the high computational power of the FPGA. It aims to improve the speed estimation behavior and to make a step towards a SOPC PMSM drive sensor-less control.
Keywords
field programmable gate arrays; permanent magnet motors; synchronous motor drives; FPGA; PMSM drive sensorless control; gate-level simulation; speed estimation behavior; Computational modeling; Digital signal processing; Field programmable gate arrays; Filtering; Finite impulse response filter; Sensorless control; Signal processing algorithms; Sliding mode control; Thermal resistance; Uncertain systems;
fLanguage
English
Publisher
ieee
Conference_Titel
Industry Applications Conference, 2007. 42nd IAS Annual Meeting. Conference Record of the 2007 IEEE
Conference_Location
New Orleans, LA
ISSN
0197-2618
Print_ISBN
978-1-4244-1259-4
Electronic_ISBN
0197-2618
Type
conf
DOI
10.1109/07IAS.2007.200
Filename
4347949
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