DocumentCode
166752
Title
Electrical Overstress robustness and test method for ICs
Author
Kamdem, Alain ; Martin, Patrick ; Lefebvre, Jean-Luc ; Berthet, Fanny ; Domenges, B. ; Guillot, Phillipe
Author_Institution
Lab. Commun, Normandie Univ., Caen, France
fYear
2014
fDate
7-12 Sept. 2014
Firstpage
1
Lastpage
7
Abstract
With electronics technology improvements, Electrical OverStress (EOS) failures due to Over Voltage Stress (OVS) event became the current issue instead of ElectroStatic Discharge (ESD). To better specify devices Absolute Maximum Rating (AMR), this study deepens the knowledge of robustness threshold and helps understanding failure mechanisms on ICs components besides ESD.
Keywords
electrostatic discharge; failure analysis; integrated circuit reliability; integrated circuit testing; AMR; EO failures; ESD; ICs components; OVS; absolute maximum rating; electrical overstress robustness threshold; electrostatic discharge; failure mechanisms; overvoltage stress; test method; Degradation; Earth Observing System; Electrostatic discharges; Failure analysis; Integrated circuits; Robustness; Stress;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD), 2014 36th
Conference_Location
Tucson, AZ
ISSN
0739-5159
Type
conf
Filename
6968811
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