Title :
A hardware immune system for benchmark state machine error detection
Author :
Bradley, Daryl ; Tyrrell, Andy
Author_Institution :
Dept. of Electron., York Univ., UK
Abstract :
A novel error detection mechanism is demonstrated for integration into a hardware fault tolerant system. Inspiration is taken from principles of immunology to create a hardware immune system that runs in real-time hardware and continuously monitors a finite state machine architecture for errors. The work is demonstrated through immunisation of the ISCAS´89 benchmark state machine data set
Keywords :
error detection; fault tolerant computing; finite state machines; real-time systems; ISCAS´89 benchmark state machine data set; benchmark state machine error detection; continuous monitoring; finite state machine architecture; hardware fault tolerant system; hardware immune system; immunisation; immunology; real-time hardware; Automata; Circuits; Design engineering; Embryo; Fault detection; Fault tolerant systems; Hardware; Immune system; Protection; Reliability engineering;
Conference_Titel :
Evolutionary Computation, 2002. CEC '02. Proceedings of the 2002 Congress on
Conference_Location :
Honolulu, HI
Print_ISBN :
0-7803-7282-4
DOI :
10.1109/CEC.2002.1007030
