Multiple output domino logic (MODL) in SOI

MODL may be used to reduce area, power and delay. However, many of the design practices used to alleviate the bipolar leakage problem in SOI domino logic gates cannot be applied to MODL. Predischarge of internal nodes is incompatible with the MODL requirement that internal nodes be precharged. It is advised that the widest set of parallel transistors be placed at the bottom of the logic block (i.e., near ground) in an SOI domino gate, but reordering may modify intermediate output functions in MODL. In this paper, we examine how to implement MODL in SOI while minimizing the risk of upset due to bipolar leakage.