DocumentCode :
1670005
Title :
A 106dB SNR hybrid oversampling ADC for digital audio
Author :
Nguyen, Khiem ; Adams, Bob ; Sweetland, Karl ; Chen, Huaijin ; McLaughlin, Kevin
Author_Institution :
Analog Devices Inc., Wilmington, MA, USA
fYear :
2005
Firstpage :
176
Abstract :
A ΔΣ ADC with a CT 1st-stage is presented. A hybrid tuning circuit adjusts the RC time constant to compensate for process, supply, and sampling rate variations. The ISI of the feedback DAC is eliminated by an RTZ scheme applied to the error current of the CT integrator. The ADC achieves 106dB SNR, -97dB THD+N, occupies 0.82mm2 in a 0.35μm CMOS process and dissipates 18mW.
Keywords :
CMOS integrated circuits; analogue-digital conversion; audio signal processing; circuit feedback; circuit tuning; digital-analogue conversion; integrating circuits; intersymbol interference; signal sampling; 0.35 micron; 18 mW; CMOS process; CT integrator; ISI; RC time constant; RTZ scheme; digital audio; error current; feedback DAC; hybrid oversampling ADC; hybrid tuning circuit; sampling rate variations; Circuit optimization; Clocks; Electromagnetic interference; Flip-flops; Harmonic distortion; Jitter; Sampling methods; Switched capacitor circuits; Switches; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0193-6530
Print_ISBN :
0-7803-8904-2
Type :
conf
DOI :
10.1109/ISSCC.2005.1493926
Filename :
1493926
Link To Document :
بازگشت