QRS Recognition with Programmable Hardware

In recent years, wavelet transform is applied to ECG signal processing for ECG characteristic points detection. However, most of the published algorithms are offline algorithms running in personal computer. This paper proposes the QRS complex detection design in field programmable gate array (FPGA). Although there are a few papers about implementing QRS detection design in FPGA most of them employ embedded processor in FPGA, resulting in that the parallel processing advantage of FPGA can not be fully utilized. The proposed design utilizes the parallelism of FPGA and can operate in the maximum throughput of 57.534 MSa/s in real time, while the sampling rate of input ECG signal is only several hundred samples per second.