A Research on IDDT Test Pattern Generation Algorithm Based on Digragh Model

According to the CMOS NAND gate model, we present a transient current (IDDT) test pattern automatic generation algorithm based on digraph model in this paper. First, we describe the IDDT path that may be formed of a CMOS NAND gate when inputs change, and build the generation table. Next, we build all IDDT path digraph models by regarding the inputs which can generate IDDT as the IDDT test patterns. Based on it, we present a corresponding IDDT test vectors generation algorithm. The results of experiment demonstrate that this algorithm has good precision and efficiency.