An offset-tolerant self-correcting sense amplifier for robust high speed SRAM

In this paper we have proposed a novel Sense Amplifier (SA) design which is capable of predetermining the direction of offset in threshold voltage in the sensing transistors and which provides up to 24% more current differential by activating a path for current to flow in a device, parallel to the weaker transistor, thus compensating the inherent offset. Due to its self correcting capability, the design is called a Self Correcting Sense Amplifier (SCSA). Analysis carried out on Current Latch Sense Amplifier (CLSA) and SCSA showed 2.3× offset tolerance in SCSA when compared to CLSA at high-density SRAM conditions (500fF bit-line capacitance). SCSA also consumed 9% less dynamic power and offers 13% less sensing delay in offset condition. This resulted in a 27% reduction in power delay product. It thus offers a much better read-effectiveness and robustness against device mismatch and bit-line capacitances as well as V_DD variation.