Design and construction of a PC-based stack machine simulator for undergraduate computer science and engineering courses

A senior level compiler design course in an undergraduate computer science and engineering program usually deals with teaching the students the basics of compiler construction. Since the impetus of such an undergraduate course is to deal with the issues of compiler construction rather than intricacies of different machines, it is instructive to generate the code for a simple stack machine, incorporating a hardware stack, rather than dealing with a register-based machine such as a microcomputer. However, the educational institutions have the latter as a well established computing platform. Therefore, for testing a constructed compiler for a stack machine, it is feasible to make a microcomputer-based stack machine simulator. This paper presents the working design of a PC-based stack machine simulator developed by the authors for use in an undergraduate computer science and engineering course in compiler design. This paper begins by putting forward the architecture of the virtual stack machine for which the simulator is designed and constructed. The stack machine´s instruction set is explained and then followed by a discussion of its encoding scheme. The main data structures and the different stages of the simulator are elaborated upon, culminating in a description of the salient features of the simulator that make it an effective tool in a compiler construction course. This includes the simulator´s different analytical features such as measuring space-time complexity to analyze the effectiveness of a compiled code