• DocumentCode
    167381
  • Title

    Memory-Aware List Scheduling for Hybrid Platforms

  • Author

    Herrmann, J. ; Marchal, Loris ; Robert, Yannick

  • Author_Institution
    Ecole Normale Super. de Lyon, INRIA, Lyon, France
  • fYear
    2014
  • fDate
    19-23 May 2014
  • Firstpage
    689
  • Lastpage
    698
  • Abstract
    This paper provides memory-aware heuristics to schedule tasks graphs onto heterogeneous resources, such as a dual-memory cluster equipped with multicores and a dedicated accelerator (FPGA or GPU). Each task has a different processing time for either resource. The optimization objective is to schedule the graph so as to minimize execution time, given the available memory for each resource type. In addition to ordering the tasks, we must also decide on which resource to execute them, given their computation requirement and the memory currently available on each resource. The major contributions of this paper are twofold: (i) the derivation of an intricate integer linear program formulation for this scheduling problem, and (ii) the design of memory-aware heuristics, which outperform the reference heuristics HEFT and MinMin on a wide variety of problem instances. The absolute performance of these heuristics is assessed for small-size graphs, with up to 30 tasks, thanks to the linear program.
  • Keywords
    graph theory; integer programming; linear programming; multiprocessing systems; processor scheduling; FPGA; GPU; MinMin; accelerator; computation requirement; dual-memory cluster; heterogeneous resources; heuristics HEFT; hybrid platforms; integer linear program formulation; memory-aware heuristics; memory-aware list scheduling; multicores; optimization objective; scheduling problem; small-size graphs; tasks graphs schedule; Computational modeling; Memory management; Optimal scheduling; Processor scheduling; Schedules; Scheduling; HEFT; algorithm; hybrid platforms; list scheduling; memory;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel & Distributed Processing Symposium Workshops (IPDPSW), 2014 IEEE International
  • Conference_Location
    Phoenix, AZ
  • Print_ISBN
    978-1-4799-4117-9
  • Type

    conf

  • DOI
    10.1109/IPDPSW.2014.80
  • Filename
    6969450