VLSI performance analysis method for low-voltage circuit operation

Author

Schrom, G. ; Liu, D. ; Fischer, C. ; Pichler, C.H. ; Svensson, C.H. ; Selberherr, S.

Author_Institution

Inst. for Microelectron., Tech. Univ. Wien, Austria

fYear

1995

Firstpage

328

Lastpage

330

Abstract

An efficient and accurate method for VLSI performance analysis is presented. It takes measured or simulated IV and capacitance data as input and yields the noise margins and delay parameters directly without any intermediate parameter extraction, avoiding the common errors of compact modeling. The method is applied to the IV/C data of an ultra-low-power CMOS process and the results are then verified by a rigorous device-level simulation of ring oscillators

Keywords

CMOS integrated circuits; VLSI; capacitance; circuit analysis computing; delays; digital simulation; integrated circuit modelling; integrated circuit noise; IV data; VLSI; capacitance data; delay parameters; device-level simulation; low-voltage circuit operation; noise margins; performance analysis method; ring oscillators; ultra-low-power CMOS process; CMOS process; Capacitance measurement; Circuit noise; Circuit simulation; Delay; Noise measurement; Parameter extraction; Performance analysis; Semiconductor device modeling; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuit Technology, 1995 4th International Conference on

Conference_Location

Beijing

Print_ISBN

0-7803-3062-5

Type

conf

DOI

10.1109/ICSICT.1995.500155

Filename

500155